The present disclosure relates generally to a semiconductor device, such as a semiconductor integrated circuit, and more particularly to a method of semiconductor device fabrication including an etching process.
A typical semiconductor fabrication process includes forming a masking element such as, a photoresist feature, on a layer that is to be patterned. The masking element protects a portion of the layer such that the open portions of the layer can be etched. Conventional etching processes include wet etching and dry etching. The isotropic nature of the etching process, in particular for wet etching, can cause issues with the transfer of a pattern from the masking element to the target layer however. This is particularly a concern where the target layer is very thin. Undercutting (e.g., removal of the target layer beneath the masking element) may caused by a lateral component of an isotropic etch. The undercutting may provide defects in patterning of the target layer such as imprecise dimension control. The undercutting can also reduce the surface area of adhesion between the masking element and the substrate, which may lead to defects such as peeling of the masking element during subsequent processes. Though a dry etch process may lessen the isotropic nature of the etch, it may introduce further problems such as, damage to the masking element, target layer, and/or underlying layers. These issues may be especially critical in fabricating a semiconductor device including a high-k gate dielectric/metal gate structure. The gate structure may include thin layers for which dimensions must be tightly controlled during patterning.
Therefore, what is desired is an improved method of etching a layer of a semiconductor device.